6420-001-N-K Pacific Scientific
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The Pacific Scientific 6420-001-N-K is part of the 6410 Stepper Drives series and supports two control axes with a maximum fixed resolution of 51,200 pulses per revolution. This drive accommodates a peak microstep current of 7.1 Amps and includes 8 user I/O ports with 1792 bytes of user memory. The chassis temperature can reach up to 60 degrees Celsius, and it supports an RS-485 node count of 32.
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Product Description:
The 6420-001-N-K is a compact two-axis stepper drive designed and manufactured by Pacific Scientific for integration into the 6410 Stepper Drives series. Intended for mid-range positioning tasks in automated assembly equipment and small gantry stages, the unit translates RS-485 motion commands into regulated phase currents that propel hybrid stepper motors. Its onboard processor, nonvolatile memory, and discrete I/O allow the controller to sequence moves, coordinate both axes, and monitor machine states without a separate PLC.
Position fidelity is governed by a fixed microstepping lattice of 51,200 pulses/rev, while the drive can also select a variable scale of 20,000 pulses per revolution for legacy motion files. The drive generates up to 19,000 steps/s, a rate that supports carriage speeds in light pick-and-place or laboratory automation. Each motor phase can receive a continuous limit of 5 A RMS; current loops are adjusted through sense resistors that keep saturation at or below the logic supply. Command packets travel on an RS-485 bus, where a maximum of 32 nodes can share one line operating at 9600 bps. Digital inputs recognize a logic high of 3.7 VDC or higher and a logic low of 0.8 VDC or lower. The optically isolated outputs can sink 70 mA down to 1.0 VDC.
During microstepping bursts, the current modulator can reach a peak of 7.1 A, but forced airflow must keep the aluminum chassis below 60 °C. The unit occupies only 7.5 sq in of panel area, leaving room for ancillary fusing and cable ducts. Programmable sequences, homing routines, and diagnostic flags reside in 1792 bytes of nonvolatile user memory. This memory is accessed through eight discrete, user-assignable I/O lines. Index tables and error-handling routines can be stored locally, minimizing traffic on the host network during machine cycles.
