CML25.1-PN-16D Bosch Rexroth Indramat
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MPN: R901423029
Ask for AvailabilityThe Bosch Rexroth Indramat CML25.1-PN-16D is a Control Main Unit from the CML IndraControl Hardware series. It features a Renesas SH 7785 processor with a clock frequency of 576 MHz and comes with 128 MB base DRAM and 16 MB configured DRAM. The unit includes an inline housing and supports PROFIBUS interfacing.
Internal Product Review
The CML25.1-PN-16D is a control main unit with an inline housing that supports clean, efficient cabinet integration. Renesas SH 7785 processing and 128 MB base DRAM give this unit a strong technical profile for fast, stable control performance.
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Product Description:
The CML25.1-PN-16D control main unit is manufactured by Bosch Rexroth Indramat as a member of the CML IndraControl Hardware series. Within an automation cell, this device serves as the primary logic processor, supervising axis drives, safety nodes, and human-machine interfaces through deterministic fieldbus links. By consolidating sequencing and motion commands in one hardware layer, the unit helps reduce cabinet space and wiring complexity while preserving tight cycle-time requirements. It is suited for packaging, printing, and material-handling equipment where rapid Boolean processing and synchronized timing are required.
At the heart of the controller is a Renesas SH 7785 superscalar processor that operates at 576 MHz, delivering ample instruction throughput for multitasking PLC, motion, and visualization programs. The board carries 128 MB of base DRAM so temporary data buffers and real-time variables can be accessed without paging delays. An Inline housing format lets the CPU slide directly onto adjacent I/O slices, forming a continuous backplane without separate bus wiring. For plant communication, the onboard PROFIBUS interface exchanges cyclic data frames with distributed drives and remote I/O at standard baud rates, while the Ethernet service port remains available for diagnostics and data transfer.
A dedicated flash block stores the operating system, while the separate 16 MB of configured DRAM is reserved for user programs, recipes, and trending arrays. CPU design variant 1 identifies the reduced-power layout that limits heat in high-density cabinets without changing instruction compatibility. Hardware generation 25 places the unit within the current CML platform. Consistent timing behavior helps keep PLC tasks and motion loops synchronized when the device operates beside earlier CML CPUs.